ChipNeMo explores the use of LLM for industrial chip design, employing domain adaptation techniques instead of relying on commercially available LLM. These techniques involve personalized tokenization, domain-adaptive pre-training, supervised fine-tuning with domain-specific guidance, and domain-adaptive retrieval models. The study evaluates these methods across three LLM applications in chip design, resulting in notable performance improvements compared to general-purpose models. It enables a substantial reduction in model size with equal or improved performance on various design tasks, while highlighting the potential for further refinement in domain-tailored LLM approaches.
The study explores domain-specific applications of LLMs in chip design, emphasizing the presence of proprietary data in various domains. It delves into augmented retrieval generation to improve knowledge-intensive NLP and code generation tasks by incorporating sparse and dense retrieval methods. Previous research in chip design has taken advantage of fine-tuning open source LLMs on domain-specific data to improve performance on tasks such as Verilog code generation. It also calls for further exploration and improvement of domain-tailored LLM approaches in chip design.
Electronic design automation (EDA) tools have improved chip design productivity, but some time-consuming language-related tasks still need to be completed. LLMs can automate code generation, engineering responses, analysis, and error classification in chip design. Previous research has explored LLM applications for generating RTL and EDA scripts. Domain-specific LLMs demonstrate superior performance on domain-specific chip design tasks. The goal is to improve the performance of LLM while reducing the model size.
The chip design data was processed through custom tokenizers, optimizing its suitability for analysis. Domain-adaptive continuous pretraining procedures were performed to fine-tune the pretrained base models, aligning them with the chip design domain. Supervised tuning leveraged general and domain-specific chat instruction datasets to refine model performance. Domain-tailored retrieval models, encompassing sparse retrieval techniques such as TF-IDF and BM25, as well as dense retrieval methods using pre-trained models, were leveraged to improve information retrieval and generation.
Domain adaptation techniques in ChipNeMo produced notable performance improvements in LLMs for chip design applications, spanning tasks such as engineering chatbots, EDA script generation, and error analysis. These techniques not only significantly reduced model size but also maintained or improved performance on various design tasks. The domain-adapted recovery models outshone the general-purpose models and showed notable improvements: 2x better than the unsupervised models and a notable 30x increase compared to the Sentence Transformer models. Rigorous evaluation benchmarks, encompassing multiple-choice queries and code generation evaluations, provided quantifiable insights into the model’s accuracy and effectiveness.
In conclusion, domain-tailored techniques such as custom tokenization, domain-adaptive pre-training, supervised fine-tuning with domain-specific instructions, and domain-tailored retrieval models marked a substantial improvement in LLM performance for chip design. ChipNeMo models, exemplified by ChipNeMo-13B-Chat, showed comparable or superior results to their base models, narrowing the performance gap with more powerful LLaMA2 70B models in engineering assistant chatbot tasks, EDA script generation, and error analysis.
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Hello, my name is Adnan Hassan. I’m a consulting intern at Marktechpost and soon to be a management trainee at American Express. I am currently pursuing a double degree from the Indian Institute of technology, Kharagpur. I am passionate about technology and I want to create new products that make a difference.
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